Showing posts with label verilog. Show all posts
Showing posts with label verilog. Show all posts

Verilog Mem File from Compiled ELF

Oct 22, 2019
I've seen many ways to convert a compiled ELF file (like a.out) to a Verilog Mem file.  Some of the ways to use Python or some custom converter program or shell script or ????.  What if you want to move between Linux and Window without have to recompile the converter program or install the heavyweight Python.

The trick is to use the SRecord program.  There are three steps

0. Install the SRecord program for Linux, Windows, etc.
1. Compile your program (make or whatever gets that ELF output)
2. Make a binary file with objcopy -O binary a.out aout.bin
3. Final convert is srec_cat aout.bin -binary -byte-swap 4 -O mem.init -Lattice_Memory_Initialization_Format  32 -Data_Only

Explanation of the srec_cat command
aout.bin: the binary from objcopy (use cross-compiler if needed)
-binary: format of the input file
-byte-swap 4: little-endian (leave out if big-endian)
-O mem.init: output file name (doesn't have to be mem.init)
-Lattice_Memory_Initialization_Format 32: seems to format the output correctly
-Data_Only: leave off the header information normally in the Lattice Mem format

This can all be done with a Makefile that can be used anywhere SRecord (srec_cat) command is available.

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DE0-Nano Amber Core.

Oct 27, 2017
Amber FPGA core ported to run on DE0-Nano

Old project completed around 1H 2014.  I found the Amber Core on opencores.org and using a Google translation of porting instructions for Marshod2 board, I was able to load the Amber 32bit SoC onto the DE0-Nano board.  This is a Quartus II project called "mARM" from the hw/marshod2 directory.

Overall the project was successful, but generally, the organization is a mess as I wasn't using Github or any versioning system.

Starting from the baseline of the Marshod2 porting instructions that was translated from Google, I followed the steps outlined in the document, updating to Cyclone IV, 32Mbytes of SDRAM memory and pinout for FPGA.  For the Software portion, I had to make some adjustments to the Address Map.

Original system Marshod2-Altera Cyclone III based board, 8 MBytes of memory.

  • Adjusted to 32 MBytes of memory with WB_SDRAM_CTRL core.
  • Added TTL serial to USB adapters for console/serial ports
  • LEDs show system reset, system ready and GPIO 2-7
  • Added SPI
  • Removed Ethernet


I was able to load Linux from vmlinux-my in SW directory.  It is Linux 2.4, so it is very Old version and is of limited use.

Also provided is an in-system memory tester in the memtest3 directory; it must be loaded from the bootloader.  A version that runs in place of the bootloader is in the memtest-ldr directory

UART baud: 921600

> b 700000
Send file w/1K Xmodem protocol from terminal emulator now...
CC> l
Send file w/1K Xmodem protocol from terminal emulator now...
CCCCCCCCCCCCC
elf split
> j 80000
j 0x00080000

Linux version 2.4.27-vrs1 (nick@ubuntu) (gcc version 4.5.2 (Sourcery G++ Lite 2011.03-46) ) #1 Tue Jan 22 23:48:37 PST 2013
CPU: Amber 2 revision 0
Machine: Amber-FPGA-System
On node 0 totalpages: 256
zone(0): 256 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: console=ttyAM0 mem=8M root=/dev/ram
19.91 BogoMIPS (preset value used)
Memory: 8MB = 8MB total
Memory: 6304KB available (783K code, 222K data, 64K init)
Dentry cache hash table entries: 4096 (order: 0, 32768 bytes)
Inode cache hash table entries: 4096 (order: 0, 32768 bytes)
Mount cache hash table entries: 4096 (order: 0, 32768 bytes)
Buffer cache hash table entries: 8192 (order: 0, 32768 bytes)
Page-cache hash table entries: 8192 (order: 0, 32768 bytes)
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Initializing RT netlink socket
Starting kswapd
ttyAM0 at MMIO 0x16000000 (irq = 1) is a WSBN
pty: 256 Unix98 ptys configured
Serial driver version 5.05c (2001-07-08) with no serial options enabled
ttyS00 at 0x03f8 (irq = 10) is a 16450
ttyS01 at 0x02f8 (irq = 10) is a 16450
RAMDISK driver initialized: 16 RAM disks of 208K size 1024 blocksize
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP
IP: routing cache hash table of 4096 buckets, 32Kbytes
TCP: Hash tables configured (established 4096 bind 8192)
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
RAMDISK: ext2 filesystem found at block 0
RAMDISK: Loading 200 blocks [1 disk] into ram disk... done.
Freeing initrd memory: 208K
VFS: Mounted root (ext2 filesystem) readonly.
Freeing init memory: 64K
BINFMT_FLAT: Loading file: /sbin/init
Mapping is 2b0000, Entry point is 8068, data_start is 8e4c
Load /sbin/init: TEXT=2b0040-2b8e4c DATA=2b8e50-2b8e83 BSS=2b8e83-2b8e88
start_thread(regs=0x21f9fa4, entry=0x2b8068, start_stack=0x2affb4)
Hello, World!
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